Phoenix Systems ports Phoenix-RTOS to EnSilica’s eSi-RISC processor family
EnSilica / Phoenix Systems collaboration further expands the eSi-RISC ecosystem and paves the way for the development of embedded smart grid solutions.
Wokingham, UK and Warsaw, Poland EnSilica and Phoenix Systems have announced that they have successfully ported the Phoenix-RTOS, designed specifically for both single and multicore embedded systems applications, to the eSi-RISC family of highly configurable soft processor cores. The collaboration between EnSilica and Phoenix Systems further expands the eSi-RISC ecosystem with an embedded RTOS capable of fully utilising eSi-RISC’s hardware MMU with memory protection and security features such as data execution protection. It also paves the way for embedded power line and wireless smart grid solutions with the combination of Phoenix Systems’ proposed smart grid software protocol stacks and eSi-RISC’s support for custom instructions accelerating performance and improving PHY layer implementations.
Phoenix Systems’ Phoenix-RTOS is a state-of-the-art, fully proprietary, real-time operating system designed specifically for both single and multicore embedded applications. Its modularity and portability, coupled with a small footprint, virtual memory support and an advanced architecture that implements the latest operating system mechanisms and programming abstractions, ideally suit it to use with highly configurable soft processor cores like the eSi-RISC family. The fully re-entrant and pre-emptive kernel supports scheduling strategies that allow for the prioritization of critical task execution. Additional components, such as TCP/IP and USB stacks, common file systems and POSIX interface, further leverage its potential for machine-to-machine communication and smart grid applications.
EnSilica’s eSi-RISC family provides a range of high quality, highly configurable embedded processors that are easy to integrate. The processor subsystem is delivered fully targeted to customers’ ASIC technology, thereby reducing integration effort. eSi-RISC processors provide the flexibility to define a range of hardware functions to optimize the silicon area. On–chip memory requirements are reduced through inter-mixed 16-bit and 32-bit instructions, resulting in good code density without compromising performance. The incorporation of a hardware MMU coupled with multiple execution privilege levels enable critical applications to be run separately to ensure they don't interfere with one another. eSi-RISC is the only processor family scalable from 16-bits to 32-bits, starting from as low as 8.5k gates. It utilizes the industry standard GNU optimizing C/C++ compiler and Eclipse IDE for rapid software development, and supports efficient debugging on the target through a JTAG interface and hardware breakpoints. The development suite, which will include Phoenix-RTOS in the next release, is common to both 16-bit and 32-bit processors, protecting users’ software investment.
“The Phoenix-RTOS port significantly enhances the overall eSi-RISC ecosystem and opens up a whole host of potential new opportunities for our customers as well as further reducing time-to-market and the total cost of embedded development,” said Ian Lankshear, Managing Director of EnSilica. “We are, therefore, extremely pleased to collaborate with Phoenix Systems to rapidly implement the port of Phoenix-RTOS to our eSi-RISC family of soft processor cores.”
“Our collaboration with EnSilica not only represents an excellent opportunity to widen the range of platforms supported by Phoenix-RTOS but, we believe, it also releases the full potential of the eSi-RISC processor family,” stated Paweł Pisarczyk, CEO of Phoenix Systems. “The combination of Phoenix-RTOS and eSi-RISC will give customers a distinct commercial advantage in the upcoming smart grid market by allowing us to prepare fully integrated embedded smart grid solutions. Soon, Phoenix-RTOS will be integrated into a range of smart meters as well as medical devices such cardio-monitors.”
EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of IC design services, from System Level Design, RTL coding and Verification through to either a FPGA device or the physical design for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP and eSi-Crypto encryption IP. For further information about EnSilica, visit http://www.ensilica.com
About Phoenix Systems
Phoenix Systems is a software company, established in December 2011 by a team of embedded software experts. Phoenix Systems’ main product, the real-time operating system Phoenix-RTOS, targets a wide range of embedded platforms including configurable processors. Phoenix-RTOS particularly targets machine-to-machine communication and smart grids devices. Further applications of Phoenix-RTOS include, but are not limited to, communications, medical and automotive markets. Phoenix Systems is headquartered in Warsaw, Polandwith additional offices in Bristol, UK. The company is a member of SETsquared's Bristol Business Acceleration Centre. For additional information about Phoenix Systems and Phoenix-RTOS, visit http://www.phoesys.com
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EnSilica is an established company with many years’ experience providing high quality front-end IC design services to customers undertaking FPGA and ASIC designs. We have an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Our customers range from start-ups to blue-chip companies.