Job Overview:
There are not many people in the world that can claim to be an expert on designing memory systems. If you possess such rare skills, then we hope you will consider joining us in the GPU Hardware team as our new GPU Memory System Design Architect!
Below follows some typical problems our team is working on solving every day. We hope you find them intriguing!
Problem 1) Make a scalable memory system
We make GPUs for small screens such as watches, and for large screens found in laptops, car dashboards, TVs and flagship cell phones. The GPUs driving the smallest screens might have only one core, whereas the large screens require large multi-core GPUs with a beefy memory system.
- Suggest a way to build a memory system that can feed both small GPUs and large beasts with data.
Problem 2) Cache coherency
In our GPUs there are typically several shader cores, each with a L1 cache. These shader cores are connected to a shared L2 cache within the GPU. The GPU and the CPU cluster in the system is finally often also talking to a system level cache.
- Are you familiar with adding support for cache coherency protocols in memory systems?
Problem 3) Address translation
Address translation is typically needed for every read and write transaction within the shader cores. Low latency as well as throughput that scales linearly with the number of cores is important. This is hard to achieve by directly wiring up the cores to a central Memory Management Unit.
- Suggest a better way to implement address translation.
Responsibilities:
In this role you will be responsible for Architecting the memory system found in the Mali and Immortalis GPUs.
The compute workload changes over time and there is an every increasing demand for more compute power. These are a couple of the mechanisms driving new features and improvements into our GPUs.
Architects have an overall responsibility of the architecture of the memory system. High level feature and PPA improvement requirements will be provided. The mission is then to explore the design space and discuss ideas with the rest of the team. As a part of this work you will document ideas and provide estimates of throughput, performance, energy consumption area and bandwidth for the proposed changes.
You will work closely with memory system designers and verification engineers and together we will deliver new memory systems to our GPUs that both meets our high quality standards as well as PPA targets.
Architects also work with the wider GPU team including project leads, architects for other parts of the GPU, the implementation team, our GPU modelling team and the software and firmware team to name a few.
Required Skills and Experience :
- Must have designed memory system components such as Caches and MMUs before, preferably for use in multicore CPU or GPU systems.
- Should be able to have a meaningful discussion about the example problems listed in this advertisement.
- Must have written a whole lot of HDL (Verilog, SystemVerilog, VHDL) code at some point in your career.
“Nice To Have” Skills and Experience :
- Written papers, book chapters or books about caches. Presented at international conferences.
- Strong coding skills.
In Return:
Arm is committed to global talent acquisition, offering an attractive relocation package. With offices around the world, Arm is a diverse organisation of dedicated, creative and highly talented engineers. By enabling a dynamic, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their unrivalled contributions to Arm's success in the global marketplace.
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