Compute Express Link (CXL) is a new high-speed CPU interconnect interface to accelerators and memory expansion. Arm joins forces in CXL with industry leaders Alibaba, Facebook, Google and Microsoft and hardware providers Cisco, Dell EMC, Hewlett Packard Enterprise, Huawei and Intel Corporation, aiming to develop the necessary specifications.
Arm joins CXL - establishing key industry standard to streamline heterogeneous compute
Richard Grisenthwaite, SVP, Chief Architect & Fellow at Arm, writes:
As the industry moves toward heterogenous compute for key workloads, such as networking, storage, graphics, and machine learning, CXL reinforces the need for standardization and is aiming for a high-speed, low latency interconnect between the CPU and a growing variety of workload accelerators. Standards are important to enable innovative system designs by ensuring interoperability with different optimized system components. Arm joined the CXL Consortium both to ensure low friction CXL development to the Arm ecosystem and to contribute to the future definition with CXL member companies.
Arm has been actively participating in the CXL work groups andhas dedicated key resources to promote CXL, including several Arm Fellows and Principal Engineers.
Fitting with Arm’s standards strategy
Arm brings to the table its track record in establishing a full software framework and aims to promote the migration to CXL as the interface to the accelerators and memory expansion. We expect to maintain CCIX to support inter-package chip-to-chip interface that is currently not in the scope of CXL. We will continue to support customer solutions based on existing CCIX hardware.
Arm has a proven track record developing standards such as AMBA, an open standard for on-chip communication. AMBA architecture provides the on-chip interconnect definitions for highly scalable SoCs in the datacenter, from compute servers to networking, storage, security and other accelerators. This includes an associated ecosystem with development tools from all leading EDA vendors. The most prevalent on-chip interface for 3rdparty PCIe IP is AMBA. Arm collaborates in industry multi-chip interconnect standards to optimize performance between on-chip and off-chip domains. Arm is also a board member in the PCI SIG and the Gen-Z Consortium. Gen-Z is the fabric that allows for rack and row connectivity for CPUs, accelerators, and memory.
Arm also invests in software architecture focused on portability and simplified deployment by working within the UEFI Forum. This forum provides the necessary interfaces between the firmware and the operating systems to support the accelerator and memory expansion use cases across different implementations. Arm is to lead the UEFI sub-team in the System and Software Work Group, after contributing the platform interfaces developed for CCIX that equally map to CXL. Arm also sees the opportunity for harmonizing open source development in addition to firmware standards, for example, a common accelerator framework and an accelerator library that can foster adoption of both CXL and CCIX in the short term, just like PMDK does for persistent memory.
Advancing the ecosystem
We have a well-established ecosystem and have its best interests at heart. We hope to be joined by many of our partners within the consortium, to represent the views of the Arm ecosystem and develop this key standard for the benefit of heterogeneous compute. Arm is a strategic choice of IP provider for the ecosystem. Our interconnect IP (CMN) is committed to enable CXL for both processor and end-point devices based on our customer input.
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