We are looking for a hard-working, creative and motivated engineer to join our GPU development team! We need someone who can work closely with the block design teams, crafting and implementing new processes and methodologies needed to develop next generation GPUs.
The role is based in Cambridge in the UK. The successful candidate will be an experienced hardware design engineer with a proven track record to deliver high quality results in ambitious timescales. You will work as part of a cross-site team and take ownership of a range of tasks required for the successful development, integration and delivery of innovative GPUs.
You will collaborate closely with the architecture, model, design, implementation and verification teams to ensure that Arm GPU products are delivered to our customers at the highest quality levels. You will be involved in GPU development from the early concept stages to the final delivery of the GPU to customers.
- Assembly, testing and delivery of GPU HW roadmap products.
- Development of design methodology.
- Top-level integration of RTL from different design teams and debug of complex functional and performance design issues.
- Exploration and implementation of technologies and methodologies to improve GPU power, performance and area (PPA).
Required Skills and Experience :
- Experience with hardware description languages (System Verilog preferable).
- Experience using EDA simulators (Siemens, Synopsys, Cadence)
- Experience working with version control and code review systems such as Git and Gerrit
- Experience with continuous integration, preferably using Jenkins.
- Proficiency in scripting for design automation using languages such as Python, Perl, JSON, Tcl, Make etc.
- Strong problem solving and debugging skills, and ability to closely collaborate with other teams.
“Nice To Have” Skills and Experience :
- Knowledge of Arm Mali or other mobile GPU architecture.
- Experience of SoC integration and debug.
- Good general understanding of front-end design flows.
- Low power techniques and UPF.
- Synthesis constraining and timing reports analysis.
- Linting tools.
- Design for Test (DFT), and Logic and Memory Built-In Self-test (LBIST and MBIST).
- Experience with multi clock (CDC) and multi power domain designs.
- Knowledge of clock and reset topologies.
- Project management and leadership skills
We offer a competitive reward package including annual bonus, RSUs, healthcare and wellness support. As well as other benefits such as a supplementary pension, and 25 days annual leave (with option to buy an additional 5 days per year). There's even an on-site gym in Cambridge and social events organised within the company!